The following waveforms show the behavior of scfifo megafunction for the chosen set of parameters in design BP_Data_FIFO.vhd. The design BP_Data_FIFO.vhd has a depth of 256 words of 12 bits each. The output of the fifo is registered. The fifo is in show-ahead synchronous mode. The data becomes available before 'rdreq' is asserted; 'rdreq' acts as a read acknowledge.
The above waveform shows the behavior of the design under normal read and write conditions .