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|
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Over the VME-bus: |
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Establish communication |
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Read configuration data with added security |
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Send data for storage (post-mortem) |
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|
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Optical Link |
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Synchronise / Demultiplexing of the signals |
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Save data in FIFO memories |
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Comparison of the received redundant data |
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Comparison with the threshold and warning levels |
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|
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Other |
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Read Beam-Energy data / Time-Stamp |
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Give software trigger and TTL output for dumping
the beam |
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Work autonomous (protection against main CPU
fail) |
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|
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|
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Doubling of Transmission Lines |
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Manchester Encoding |
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Synchronous transmission |
|
CRC (Cyclic Redundancy Check) |
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Comparison of the signal with its redundant |
|
FAM (Frame Alignment Monitor) |
|
Scan the digital bit stream for a FAW/preamble |
|
Inversion of One Signal |
|
Time-Stamp of data |
|
|
|
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|
|
The comparison could be made: |
|
|
|
At the output level (i.e. the Th & W
outputs) |
|
Masks any differences below |
|
Over fixed intervals |
|
Leaves uncertainty |
|
At the Sum-Registers level |
|
Much more computation |
|
Their CRCs |
|
both massages pass the check and contain
identical information |
|
4 bytes only and Pr 1E-20
(Probability of Non-Detection) |
|
|
|
|
|
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|
|
|
|
|
|
The threshold (Th) and warning (W) levels are
defined by: |
|
8 Beam Energy Levels (0.45/1 /2/ 3/ 4/ 5/ 6/ 7
TeV) |
|
6 Position Levels |
|
6 Time frames |
|
|
|
288 pair of values to be loaded universally. |
|
|
|
Advantages |
|
One table for all monitors |
|
Can thoroughly be prepared and checked before it
is uploaded. |
|
Quick and easy upgrade of all systems when it is
needed. |
|
Less computation in each system |
|
|
|
|
|
For a 10s observation & with acquisition
every 40μs: |
|
FIFO Buffers |
|
281 KBytes for Ion.Chamber Data (9 bits) |
|
250 KBytes for ADC Data (8 bits) |
|
Sum – Registers |
|
27 digits long register |
|
Memory Requirements |
|
System Using Sum-Registers: 9000 KBytes |
|
System Using Interrupt Points: 4250 KBytes |
|
Data Rate |
|
Transmission of 600 bits gives 15Mbps @
40μs acquisition
20Mbps @ 30μs acquisition |
|
|
|
|
|
How the ADC data will be treated. |
|
0.234 ,
22.345 , … |
|
When zero counts only. |
|
|
|
Speed and capacity of FPGA |
|
That define the choice of TC |
|
Notes
