18 March, 2003
Christos Zamantzas
8
Signal Verification (2)
A
B
C
Output
Remarks
0
0
0
Dump
Both signals have error
0
0
1
Dump
0
1
0
Signal B
S/W trigger (one signal at least has error)
0
1
1
X
Cannot occur / S/W trigger
1
0
0
Signal A
S/W trigger (one signal at least has error)
1
0
1
X
Cannot occur / S/W trigger
1
1
0
Dump
S/W trigger (prob. one of the counters has error)
1
1
1
Signal A
By default (– B signal would be also correct)
*Where A & B: CRC checks, C: Comparison of CRCs, 1:Correct,
0:Error