26 February 2004
Christos Zamantzas
4
Implementation of
tunnel FPGA
üProduction
of CRC-32 error detection redundant
information
q All single-bit errors.
q All double-bit errors.
q Any odd number of error.
q Any burst error with a length less than the length of
CRC.
q For longer bursts Pr
= 1.16415*10-10 probability of undetected error.
üTunnel
PCB arrangement
q8x12bit ADC in parallel + control signals,
q8 Counter inputs, etc.
ûTo
be done:
qCounters
qRegisters for ADC data
qMultiplexing of all information
}
Dependant on communication channel choice.
Mux
1 2
3 8
Encode
Acquire:
Counter Value (8 bits)
APPEND:
Status (10 bits)
APPEND:
Card No. (10 bits)
CALCULATE & APPEND:
CRC-32 (4Bytes)
APPEND:
Preamble (4~24 bits)
Transmit
(~250bits)
Acquire:
ADC Value (12 bits)